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marss0Le 10/05/2009 à 05:23
Et une autre information:'This week we have each worked on a separate area. Henrik inserted another I2C controller into the design to communicate with the DVI chip. It seems to work fine. Feeding the monitor with a DVI screen will be a common job for us both later. Torbjörn focused on defining our own SuperVidel registers for setting screen address and other stuff. These regs were hardcoded in the VHDL code until now. The registers have not yet been implemented, but it shouldn't be too much work. Later on we want to include a small soft CPU (maybe PicoBlaze) in the FPGA, to automatically control the two I2C units when new DVI or Clock settings have been written to the mentioned registers. The PicoBlaze should then take the register settings and output them to the right chip. When that is done, it will be much easier to change resolutions and clock rates, since we don't have to control the I2C controllers from our 060 code.

We have also resumed looking at the remaining EtherNats, which need quite some manual labour before shipping. "