"The first version (v1.0) was made on an Altium NB3000 development board which has an EP3C40 CycloneIII FPGA. The Jaguar Core uses 99.99% of the available space of the FPGA.
I hadn't enough space into this FPGA to complete the implementation and to do all enhancement that I would like to do, so I bought a board with an ArriaV and made the v2.0 that give me enough space to finish the implementation.
The target FPGA for the final version will be a CycloneV. "

http://scpcd.free.fr/