Des news venant de Rodolphe Czuba (17/03/09)

New design of CTPCI :

- Add an IDE port (mode PIO4) 100% compatible & 50 % faster than the Falcon one (PIO3 with Combel) with logic registers to optimize the tranfer timings according to the CT60/63 clock speed. Sorry, one wire must be connected on falcon motherboard to use this IDE port.

- New CPLD with twice logic (288 registers). The transfers of PLX reads (from SDRAM) are now supported with BURST. The writes of the PLX (into SDRAM) are not supported as BURST because of the clock difference between PLX & CT60/63 (PLX clock is divided by 2).

- Remove the drive 5 1/4 power connector

New design of PCI 4 Slots :

- Change dimensions for a better fitting into PC towers.

- Change routing from 4 layers to double face PCB to reduce cost.
- New atx holes drilling.

http://www.czuba-tech.com/CTPCI/english/Historical.htm